Exploring virtualization in RISC-V machines
“RISC-V is classically virtualizable” – We come across this statement very often when we read about the merits of the RISC-V ISA. This article looks at what ...
Welcome to Embeddedinn! This is where I document my daily technical experimentation and professional projects. Rather than a conventional tutorial site, Embeddedinn serves as a chronicle of my activities. Nevertheless, I strive to provide comprehensive information, ensuring that it is beneficial to those pursuing similar endeavors. Check out the tutorials section to explore my in-depth write-ups on a wide range of technical subjects. Join me on this exciting journey of exploration and discovery!
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Disclaimer:
All posts and data in this site or any of my other publically available work reflects just my personal view points and has nothing to do with my employers at any point in time. Also, information and documents provided on this Web site are provided "as is" without warranty of any kind, either expressed or implied, including limitation warranties of merchantability, fitness for a particular purpose, and noninfringement.Recent posts
Adding a custom peripheral to QEMU RISC-V machine emulation & interacting with it using bare-metal C code
QEMU is an excellent platform to emulate hardware platforms. But, we often end up using ready-made platforms without thinking twice about how QEMU emulates t...
Linux & Python on RISC-V using QEMU from scratch
This article explores how to set up RISC-V on QEMU, boot a simple application on it using the PK kernel, and boot a cross-compiled Linux on the emulation pla...
Booting up my first RISC-V core on an FPGA.
This article comments on how I built-up my first ARM host tethered Rocket RISC-V core on a Xilinx Zynq-7000 FPGA.
A hands-on approach to measuring microcontroller performance using Coremark.
A hands-on approach to porting the Coremark benchmark to measure and compare bare-metal microcontroller performance.